Course Code: VS-DL
Duration: 16 lessons
Monday, Wednesday: 07:00 PM - 08:45 PM
Instructor: M.Eng. Ta Xuan Tung, Eng. Nguyen Nam Phuong
Second and third-year students in Electrical Engineering, Electronics, Information Technology, etc., who need to strengthen their foundational knowledge.
Individuals aiming to pursue Digital IC Design but who lack substantial foundational knowledge.
Equip students with basic knowledge of Boolean Algebra, Digital Circuit Components, and the design of simple digital circuits.
Provide fundamental knowledge about MOSFETs and CMOS.
Build a strong foundation for further studies in more advanced topics.
Numeral systems, signed numbers, operations with unsigned and signed numbers
Floating-point arithmetic
Boolean algebra, K-map, Transformation and optimization of digital circuits
Basic logic gates, Latch, Flip-flop
Combinational circuits, sequential circuits
Synchronous, asynchronous circuits
Basics of MOSFET, CMOS
HUST Student
The instructors are enthusiastic and highly knowledgeable. The practical exercises are very realistic and suitable for students. After the course, I was able to synthesize Verilog and run routing verification using the STDCELL library
HUST Student
The course is easy to follow for beginners, with many practical exercises. I gained a lot of valuable knowledge that I can apply to my real job, like fixing timing, power, and function issues
HUST Student
I find the Standard Cell Design course extremely helpful as the content supports my work significantly. I learned how to optimize and properly share MOS in layout, considering trade-offs
Teacher
The course has been very beneficial for my current job. I have been able to apply knowledge such as circuit analysis, optimization, circuit synthesis, timing checks, calculating setup and hold times for a circuit, and setting false paths
HUST Student
I am very satisfied with the course! The lectures are detailed, easy to understand, and the instructors communicate effectively. I learned how to write Verilog models for design, and I now can write RTL and functional tests for simple designs